Update to prepare the core for TFCv2 (!3) · Merge requests · DAQ / Externals / gbt-fpga-cbm · GitLab

Vladimir Sidorenko requested to merge devel_vs into master Nov 16, 2022

Added rx_headerflag to AGWB interface for Rx word alignment
Moved Rx/Tx latency optimisation configuration to generics
Added latch_rxdata_sp process in gbt_fpga_common.vhd to relax timing requirements
Updated IP cores to Vivado 2021.2

Changes verified in https://git.cbm.gsi.de/daq/fpga-firmware/tfc/cri-tfc-v2/-/commit/d8f52e7eee6c376ac1729f30d07ce28ab7e1679b