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dirich

Project ID: 697
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Manuel Reyes authored
Changes the pinout (and some of the code) of the dirich5d_piggy to make it compatible with the DIRICH5D1_PIGGY2 layout. MReyes

The LVDS output pin-pair of channel 5 was changed to a true-LVDS pair, and one more pin was declared. An input signal was declared in the VHDL code.
b37d7833
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